SEOUL, South Korea / RankWire.AI / – Samsung Electronics has introduced new strategies for memory and storage technologies aimed at enhancing artificial intelligence infrastructure performance. The announcement was made at the 2026 OCP Global Summit in San Jose, California, which took place from October 12 to 15. The company’s roadmap emphasizes high-performance memory solutions, memory expansion via Compute Express Link, and next-generation solid-state drives. Additionally, Samsung will collaborate with AMD on a joint CXL demonstration. These initiatives aim to address the capacity limitations faced by current AI server systems.
During the event, Samsung outlined its approach through three core objectives: increasing speed, enabling memory scalability, and ensuring data persistence. To improve speed, the company showcased customized high-bandwidth memory alongside the upcoming HBM5, which represents the eighth generation of this technology. For scalability, Samsung promoted CXL as a solution to expand capacity beyond what is available within each server. In terms of data persistence, the company introduced next-generation SSD-based storage and management innovations. Storage software designed to enhance data processing efficiency in AI systems was also part of the presentation.
According to Samsung, the rising deployment of AI agents increases the demand for more memory during inference, as larger models produce more data that must remain accessible to processors. Traditional systems restrict the maximum memory per processor, but Samsung highlighted CXL technology as a practical method to overcome this barrier. The company also showcased key-value cache optimization techniques, which enable AI models to reuse previously processed data rather than repeating calculations.
Partnership with AMD Extends to CXL Memory Expansion Solutions
Samsung and AMD will collaborate on a demonstration of a CXL-based solution designed to increase memory capacity in AI systems. This technology allows processors to share memory resources instead of relying solely on local server memory. Samsung confirmed that engineers have validated this solution within real system environments. The demonstration builds upon a memorandum of understanding signed by both companies in March 2026, focusing on next-generation AI memory and computing. On October 7, AMD CEO Lisa Su visited Korea and met Jeon Young-hyun, Vice Chairman of Samsung’s Device Solutions division.
Another aspect of Samsung’s showcase was memory pooling. The company demonstrated CMM-D, a CXL-based DRAM module that connects multiple memory units into a shared pool, allowing systems to draw capacity as needed. The exhibit also included processing-in-memory technology, which performs certain calculations within memory chips to reduce data movement and energy consumption. The display featured cutting-edge wafers, including 2-nanometer gate-all-around chips, Groq LPU wafers, and Nvidia’s Groq 3 LPX system.
Early co-design efforts influence Samsung’s AI memory development roadmap
During an executive session, Shim Ho-jun, Corporate Vice President and head of Samsung’s Application Engineering Team, shared insights into the company’s strategic plans. He emphasized that the growth of larger AI models and increasing inference workloads make enhanced memory capacity and bandwidth critical to system performance. Shim also noted that Samsung is expanding co-design and technical validation collaborations with global partners from the earliest development stages, aiming to align its memory and storage products more closely with customer system designs.
Samsung’s MAX Lab provides clients with a platform to evaluate memory and storage solutions under real-world AI workloads. The lab also offers co-design services tailored to specific system configurations, enabling customers to test pre-commercial technologies such as PIM and next-generation SSDs before they are commercially available. As a Diamond Sponsor, Samsung participated in the summit, following its 2026 appearances at Nvidia GTC, COMPUTEX, and the Future of Memory and Storage conference, as part of its expanding focus on AI memory innovation.